A thin-film transistor (TFT)is known as a thin-film semiconductor device fabricated on a glass substrate. TFTs formed on such a glass substrate are disposed in a pixel driver portion and also in a peripheral circuit for a liquid crystal display and are used to display images with high information content. Furthermore, these TFTs are employed in image sensors and in other integrated circuits.
Where a glass substrate is used, the following advantages can be derived:
(1) Since it is optically transparent to visible light, the glass substrate can be easily utilized in an apparatus such as a liquid crystal display through which light is transmitted. PA1 (2) It is inexpensive. PA1 heat-treating said glass substrate at a temperature higher than a process temperature used later while holding said substrate substantially horizontal prior to formation of said semiconductor device; and PA1 cooling said glass substrate at a rate of 0.01.degree. to 0.5.degree. C./min in an ambient of nitrogen, ammonia, or dinitrogen monoxide while holding said substrate substantially horizontal.
However, the upper limit of the thermal treatment temperature is restricted by the heatproofness, i.e., the maximum usable temperature, of the glass substrate.
Corning 7059 glass is generally used as a glass substrate because of deposition of impurities, prices, and other problems. The transition point of this glass is 628.degree. C. and the strain point is 593.degree. C. Other known practical industrial glass materials having strain points of 550.degree.-650.degree. C. are listed in Table 1.
TABLE 1 __________________________________________________________________________ 7059D (CGW) 7059F (CGW) 1733 (CGW) LE30 (HOYA) TRC5 (OHARA) E-8 (OHARA) __________________________________________________________________________ strain point (.degree.C.) 593 593 640 625 643 thermal expansion 50.1 50.1 36.5 38.0 52.0 37.0 coefficient (.times. 10.sup.-7) transmission (%) 89.5 89.5 91.9 90.0 N.A. 91.0 (400 nm) (400 nm) (400 nm) (450 nm) (450 nm) composition SiO.sub.2 49 49 57 60 59 Al.sub.2 O.sub.3 10 10 16 15 15 B.sub.2 O.sub.3 15 15 11 6 7 R.sub.2 O 0.1 2 1 __________________________________________________________________________ N-0 (NEG) OA2 (NEG) AN1 (AGC) AN2 (AGC) NA35 (HOYA) NA45 (HOYA) __________________________________________________________________________ strain point (.degree.C.) 625 625 616 650 610 thermal expansion -7.0 38.0 44.0 47.0 39.0 48.0 coefficient (.times. 10.sup.-7) transmission (%) N.A. 90.0 90.0 89.8 N.A. N.A. (450 nm) (500 nm) (500 nm) composition SiO.sub.2 60 56 53 51 Al.sub.2 O.sub.3 15 15 11 11 B.sub.2 O.sub.3 6 2 12 13 R.sub.2 O 2 0.1 0.1 0.1 __________________________________________________________________________
Where an amorphous silicon film formed on a glass substrate by CVD is crystallized by heating, a high temperature, e.g., above 600.degree. C., is needed. Therefore, where a Corning 7059 glass substrate is used, the substrate is shrunk by the heating.
An active-matrix liquid crystal display is known as an apparatus utilizing TFTs formed on a glass substrate. To fabricate this liquid crystal display, it is necessary to form tens of thousands to several millions of TFTs on the glass substrate in rows and column. To manufacture the TFTs, processes using numerous masks are necessitated. Consequently, shrinkage of the substrate is a great impediment to the manufacturing process.
Especially, where it is necessary to make a mask alignment before thermal treatment, substrate shrinkage caused by the thermal treatment is a problem.
In a process for heat-treating substrates, it is common practice to place these plural substrates in vertical posture within a heating furnace, taking account of the processing speed. Where the substrates are heated above their strain point, warpage of the substrates is conspicuous.
In recent years, semiconductor devices having TFTs on a glass substrate or on other insulating substrate, e.g., an active-matrix liquid crystal display using TFTs for driving pixels and image sensors, have been developed.
As the glass substrate, Corning 7059 glass is generally used taking the price problem and the problem of impurity precipitation from the glass substrate into consideration. The Corning 7059 glass has a transition temperature of 628.degree. C. and a strain point of 593.degree. C. Other known industrial glass materials having a strain point of 550.degree. to 650.degree. C. are shown in Table 1 above.
TFTs used in these devices are generally made of silicon semiconductor in the form of a thin film. Silicon semiconductors in the form of a thin film are roughly classified into amorphous silicon semiconductors (a--Si) and crystalline silicon semiconductors. Amorphous silicon semiconductors are fabricated at low temperatures and can be fabricated relatively easily by CVD. Hence, they are adapted for mass production. In consequence, they are used most commonly. However, they are inferior in physical properties such as electrical conductivity to crystalline silicon semiconductors. Therefore, in order to obtain higher-speed characteristics, it is eagerly required that a method of fabricating TFTs consisting of crystalline silicon semiconductor be established. It is known that crystalline silicon semiconductors include polycrystalline silicon, crystallite silicon, amorphous silicon containing crystalline components, and semi-amorphous silicon having a state midway between crystalline state and amorphous state.
One known method of obtaining these crystalline thin films of silicon semiconductor consists of forming an amorphous thin semiconductor film and applying thermal energy to the film for a long time by thermal annealing to crystallize the amorphous film. This method requires that the substrate be heated above 600.degree. C. As a result, the substrate irreversibly shrinks. After a patterning step, it is impossible to perform this processing at such a high temperature. Furthermore, the heating step required for crystallization persists for as long as tens of hours. Therefore, it is necessary to shorten the heating time.
In relation to these problems, it has been recently discovered that addition of some metal element acting as a catalyst for promoting crystallization lowers the crystallization temperature and shortens the crystallization time. It has been confirmed that Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Pt, Sc, Ti, V, Cr, Mn, Cu, Zn, Au, and Ag are catalytic metal elements that are effective in promoting crystallization.
If these elements are introduced uniformly over the whole surface of a silicon film, crystals grow perpendicularly to the film, i.e., in the direction of the film thickness. However, if they are introduced into a certain portion and crystallization is caused, a crystallized region grows to the surroundings from this certain portion, i.e., grows laterally. A silicon film crystallized in this way exhibits a higher field mobility than that of a silicon film in which a catalytic metal element has been introduced uniformly.
In order to introduce such a catalytic metal element selectively, a patterning step must be carried out before a thermal annealing step for crystallization. The aforementioned shrinkage of the substrate may cause the pattern of the introduced catalytic metal element to deviate from patterns of other elements and circuits greatly. FIGS. 4(A)-4(C) show an example in which TFTs are fabricated, using the means described above. A region 402 indicated by one broken line in FIG. 4(A) shows a position at which an active layer, or a silicon film, should be patterned. A region 403 indicated by another broken line in FIG. 4(A) shows a position at which a gate electrode should be patterned. A rectangular region 401 indicated by the solid line shows a pattern in which a catalytic metal element should be introduced.
In this scheme, if a thermal annealing step is effected after a catalytic metal element has been introduced, then an elliptical region 404 shown in FIG. 4(B) is crystallized. That is, the region 404 is a laterally crystallized region. The size of this ellipse depends on the concentration of the catalytic metal element, on the thermal annealing time, and on the thermal annealing temperature. As shown in FIG. 4(B), if the gate electrode and the active region are formed in position, then channel formation regions of TFTs are formed inside the laterally crystallized region and so no problems take place. In practice, however, thermal annealing results in shrinkage of the substrate. In consequence, the gate electrode and the active layer are formed as indicated by 405 and 406, respectively. The region 404 and the channel formation region do not overlap each other. That is, of the channel formation region, a region indicated by hatching 407 remains amorphous, thus greatly deteriorating the characteristics of the TFTs.
In this way, shrinkage of the substrate makes it quite difficult to perform a patterning step before processing at a high temperature is carried out. This high temperature varies, depending on the kind of the substrate. For Corning 7059 glass which is relatively often used, the high temperature is above 500.degree. C.